8|( XD timll,omap3-devkit8000ti,omap3 +,7TimLL OMAP3 Devkit8000 with 4.3'' LCD panelchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/display m/connector0 v/connector1cpus+cpu@0arm,cortex-a8cpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+0pinmux_twl4030_pinsMAapinmux_dss_dpi_pinsMascm_conf@270sysconsimple-busp0+ p0apbias_regulator@2b0ti,pbias-omap3ti,pbias-omapipbias_mmc_omap2430ppbias_mmc_omap2430w@-aclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhamcbsp5_fckti,composite-clockamcbsp1_mux_fck@4ti,composite-mux-clocka mcbsp1_fckti,composite-clock amcbsp2_mux_fck@4ti,composite-mux-clock a mcbsp2_fckti,composite-clock amcbsp3_mux_fck@68ti,composite-mux-clock hamcbsp3_fckti,composite-clock amcbsp4_mux_fck@68ti,composite-mux-clock hamcbsp4_fckti,composite-clockaclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+0pinmux_twl4030_vpins Maaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYaosc_sys_ck@d40 ti,mux-clock @asys_ck@1270ti,divider-clockpasys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock dpll3_m2x2_ckfixed-factor-clock adpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock awkup_l4_ickfixed-factor-clock aMcorex2_d3_fckfixed-factor-clock acorex2_d5_fckfixed-factor-clock aclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clocka?virt_12m_ck fixed-clockavirt_13m_ck fixed-clock]@avirt_19200000_ck fixed-clock$avirt_26000000_ck fixed-clockavirt_38_4m_ck fixed-clockIadpll4_ck@d00ti,omap3-dpll-per-clock D 0adpll4_m2_ck@d48ti,divider-clock? Hadpll4_m2x2_mul_ckfixed-factor-clock a dpll4_m2x2_ck@d00ti,gate-clock  a!omap_96m_alwon_fckfixed-factor-clock! a(dpll3_ck@d00ti,omap3-dpll-core-clock @ 0adpll3_m3_ck@1140ti,divider-clock@a"dpll3_m3x2_mul_ckfixed-factor-clock" a#dpll3_m3x2_ck@d00ti,gate-clock#  a$emu_core_alwon_ckfixed-factor-clock$ aasys_altclk fixed-clocka-mcbsp_clks fixed-clockadpll3_m2_ck@d40ti,divider-clock @acore_ckfixed-factor-clock a%dpll1_fck@940ti,divider-clock% @a&dpll1_ck@904ti,omap3-dpll-clock&  $ @ 4adpll1_x2_ckfixed-factor-clock a'dpll1_x2m2_ck@944ti,divider-clock' Da;cm_96m_fckfixed-factor-clock( a)omap_96m_fck@d40 ti,mux-clock) @aDdpll4_m3_ck@e40ti,divider-clock @a*dpll4_m3x2_mul_ckfixed-factor-clock* a+dpll4_m3x2_ck@d00ti,gate-clock+ a,omap_54m_fck@d40 ti,mux-clock,- @a7cm_96m_d2_fckfixed-factor-clock) a.omap_48m_fck@d40 ti,mux-clock.- @a/omap_12m_fckfixed-factor-clock/ aFdpll4_m4_ck@e40ti,divider-clock @a0dpll4_m4x2_mul_ckti,fixed-factor-clock05CPa1dpll4_m4x2_ck@d00ti,gate-clock1 Padpll4_m5_ck@f40ti,divider-clock?@a2dpll4_m5x2_mul_ckti,fixed-factor-clock25CPa3dpll4_m5x2_ck@d00ti,gate-clock3 Paidpll4_m6_ck@1140ti,divider-clock?@a4dpll4_m6x2_mul_ckfixed-factor-clock4 a5dpll4_m6x2_ck@d00ti,gate-clock5 a6emu_per_alwon_ckfixed-factor-clock6 abclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock% pa8clkout2_src_mux_ck@d70ti,composite-mux-clock%)7 pa9clkout2_src_ckti,composite-clock89a:sys_clkout2@d70ti,divider-clock:@ pcmpu_ckfixed-factor-clock; a<arm_fck@924ti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock< acl3_ick@a40ti,divider-clock% @a=l4_ick@a40ti,divider-clock= @a>rm_ick@c40ti,divider-clock> @gpt10_gate_fck@a00ti,composite-gate-clock  a@gpt10_mux_fck@a40ti,composite-mux-clock? @aAgpt10_fckti,composite-clock@Agpt11_gate_fck@a00ti,composite-gate-clock  aBgpt11_mux_fck@a40ti,composite-mux-clock? @aCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockD ammchs2_fck@a00ti,wait-gate-clock ammchs1_fck@a00ti,wait-gate-clock ai2c3_fck@a00ti,wait-gate-clock ai2c2_fck@a00ti,wait-gate-clock ai2c1_fck@a00ti,wait-gate-clock amcbsp5_gate_fck@a00ti,composite-gate-clock  amcbsp1_gate_fck@a00ti,composite-gate-clock  acore_48m_fckfixed-factor-clock/ aEmcspi4_fck@a00ti,wait-gate-clockE amcspi3_fck@a00ti,wait-gate-clockE amcspi2_fck@a00ti,wait-gate-clockE amcspi1_fck@a00ti,wait-gate-clockE auart2_fck@a00ti,wait-gate-clockE auart1_fck@a00ti,wait-gate-clockE  acore_12m_fckfixed-factor-clockF aGhdq_fck@a00ti,wait-gate-clockG acore_l3_ickfixed-factor-clock= aHsdrc_ick@a10ti,wait-gate-clockH agpmc_fckfixed-factor-clockH core_l4_ickfixed-factor-clock> aImmchs2_ick@a10ti,omap3-interface-clockI ammchs1_ick@a10ti,omap3-interface-clockI ahdq_ick@a10ti,omap3-interface-clockI amcspi4_ick@a10ti,omap3-interface-clockI amcspi3_ick@a10ti,omap3-interface-clockI amcspi2_ick@a10ti,omap3-interface-clockI amcspi1_ick@a10ti,omap3-interface-clockI ai2c3_ick@a10ti,omap3-interface-clockI ai2c2_ick@a10ti,omap3-interface-clockI ai2c1_ick@a10ti,omap3-interface-clockI auart2_ick@a10ti,omap3-interface-clockI auart1_ick@a10ti,omap3-interface-clockI  agpt11_ick@a10ti,omap3-interface-clockI  agpt10_ick@a10ti,omap3-interface-clockI  amcbsp5_ick@a10ti,omap3-interface-clockI  amcbsp1_ick@a10ti,omap3-interface-clockI  aomapctrl_ick@a10ti,omap3-interface-clockI adss_tv_fck@e00ti,gate-clock7adss_96m_fck@e00ti,gate-clockDadss2_alwon_fck@e00ti,gate-clockadummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock aJgpt1_mux_fck@c40ti,composite-mux-clock? @aKgpt1_fckti,composite-clockJKaes2_ick@a10ti,omap3-interface-clockI awkup_32k_fckfixed-factor-clock? aLgpio1_dbck@c00ti,gate-clockL asha12_ick@a10ti,omap3-interface-clockI awdt2_fck@c00ti,wait-gate-clockL awdt2_ick@c10ti,omap3-interface-clockM awdt1_ick@c10ti,omap3-interface-clockM agpio1_ick@c10ti,omap3-interface-clockM aomap_32ksync_ick@c10ti,omap3-interface-clockM agpt12_ick@c10ti,omap3-interface-clockM agpt1_ick@c10ti,omap3-interface-clockM aper_96m_fckfixed-factor-clock( a per_48m_fckfixed-factor-clock/ aNuart3_fck@1000ti,wait-gate-clockN agpt2_gate_fck@1000ti,composite-gate-clockaOgpt2_mux_fck@1040ti,composite-mux-clock?@aPgpt2_fckti,composite-clockOPgpt3_gate_fck@1000ti,composite-gate-clockaQgpt3_mux_fck@1040ti,composite-mux-clock?@aRgpt3_fckti,composite-clockQRgpt4_gate_fck@1000ti,composite-gate-clockaSgpt4_mux_fck@1040ti,composite-mux-clock?@aTgpt4_fckti,composite-clockSTgpt5_gate_fck@1000ti,composite-gate-clockaUgpt5_mux_fck@1040ti,composite-mux-clock?@aVgpt5_fckti,composite-clockUVgpt6_gate_fck@1000ti,composite-gate-clockaWgpt6_mux_fck@1040ti,composite-mux-clock?@aXgpt6_fckti,composite-clockWXgpt7_gate_fck@1000ti,composite-gate-clockaYgpt7_mux_fck@1040ti,composite-mux-clock?@aZgpt7_fckti,composite-clockYZgpt8_gate_fck@1000ti,composite-gate-clock a[gpt8_mux_fck@1040ti,composite-mux-clock?@a\gpt8_fckti,composite-clock[\gpt9_gate_fck@1000ti,composite-gate-clock a]gpt9_mux_fck@1040ti,composite-mux-clock?@a^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock? a_gpio6_dbck@1000ti,gate-clock_agpio5_dbck@1000ti,gate-clock_agpio4_dbck@1000ti,gate-clock_agpio3_dbck@1000ti,gate-clock_agpio2_dbck@1000ti,gate-clock_ awdt3_fck@1000ti,wait-gate-clock_ aper_l4_ickfixed-factor-clock> a`gpio6_ick@1010ti,omap3-interface-clock`agpio5_ick@1010ti,omap3-interface-clock`agpio4_ick@1010ti,omap3-interface-clock`agpio3_ick@1010ti,omap3-interface-clock`agpio2_ick@1010ti,omap3-interface-clock` awdt3_ick@1010ti,omap3-interface-clock` auart3_ick@1010ti,omap3-interface-clock` auart4_ick@1010ti,omap3-interface-clock`agpt9_ick@1010ti,omap3-interface-clock` agpt8_ick@1010ti,omap3-interface-clock` agpt7_ick@1010ti,omap3-interface-clock`agpt6_ick@1010ti,omap3-interface-clock`agpt5_ick@1010ti,omap3-interface-clock`agpt4_ick@1010ti,omap3-interface-clock`agpt3_ick@1010ti,omap3-interface-clock`agpt2_ick@1010ti,omap3-interface-clock`amcbsp2_ick@1010ti,omap3-interface-clock`amcbsp3_ick@1010ti,omap3-interface-clock`amcbsp4_ick@1010ti,omap3-interface-clock`amcbsp2_gate_fck@1000ti,composite-gate-clocka mcbsp3_gate_fck@1000ti,composite-gate-clocka mcbsp4_gate_fck@1000ti,composite-gate-clockaemu_src_mux_ck@1140 ti,mux-clockabc@ademu_src_ckti,clkdm-gate-clockdaepclk_fck@1140ti,divider-clocke@pclkx2_fck@1140ti,divider-clocke@atclk_fck@1140ti,divider-clocke@traceclk_src_fck@1140 ti,mux-clockabc@aftraceclk_fck@1140ti,divider-clockf @secure_32k_fck fixed-clockaggpt12_fckfixed-factor-clockg wdt1_fckfixed-factor-clockg security_l4_ick2fixed-factor-clock> ahaes1_ick@a14ti,omap3-interface-clockh rng_ick@a14ti,omap3-interface-clockh sha11_ick@a14ti,omap3-interface-clockh des1_ick@a14ti,omap3-interface-clockh cam_mclk@f00ti,gate-clockiPcam_ick@f10!ti,omap3-no-wait-interface-clock>acsi2_96m_fck@f00ti,gate-clockasecurity_l3_ickfixed-factor-clock= ajpka_ick@a14ti,omap3-interface-clockj icr_ick@a10ti,omap3-interface-clockI des2_ick@a10ti,omap3-interface-clockI mspro_ick@a10ti,omap3-interface-clockI mailboxes_ick@a10ti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock> aqsr1_fck@c00ti,wait-gate-clock asr2_fck@c00ti,wait-gate-clock asr_l4_ickfixed-factor-clock> dpll2_fck@40ti,divider-clock%@akdpll2_ck@4ti,omap3-dpll-clockk$@4yaldpll2_m2_ck@44ti,divider-clocklDamiva2_ck@0ti,wait-gate-clockmamodem_fck@a00ti,omap3-interface-clock asad2d_ick@a10ti,omap3-interface-clock= amad2d_ick@a18ti,omap3-interface-clock= amspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock anssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$aossi_ssr_fck_3430es2ti,composite-clocknoapssi_sst_fck_3430es2fixed-factor-clockp ahsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockH assi_ick_3430es2@a10ti,omap3-ssi-interface-clockq ausim_gate_fck@c00ti,composite-gate-clockD  a|sys_d2_ckfixed-factor-clock asomap_96m_d2_fckfixed-factor-clockD atomap_96m_d4_fckfixed-factor-clockD auomap_96m_d8_fckfixed-factor-clockD avomap_96m_d10_fckfixed-factor-clockD  awdpll5_m2_d4_ckfixed-factor-clockr axdpll5_m2_d8_ckfixed-factor-clockr aydpll5_m2_d16_ckfixed-factor-clockr azdpll5_m2_d20_ckfixed-factor-clockr a{usim_mux_fck@c40ti,composite-mux-clock(stuvwxyz{ @a}usim_fckti,composite-clock|}usim_ick@c10ti,omap3-interface-clockM  adpll5_ck@d04ti,omap3-dpll-clock  $ L 4ya~dpll5_m2_ck@d50ti,divider-clock~ Parsgx_gate_fck@b00ti,composite-gate-clock% acore_d3_ckfixed-factor-clock% acore_d4_ckfixed-factor-clock% acore_d6_ckfixed-factor-clock% aomap_192m_alwon_fckfixed-factor-clock! acore_d2_ckfixed-factor-clock% asgx_mux_fck@b40ti,composite-mux-clock ) @asgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock= acpefuse_fck@a08ti,gate-clock ats_fck@a08ti,gate-clock? ausbtll_fck@a08ti,wait-gate-clockr ausbtll_ick@a18ti,omap3-interface-clockI ammchs3_ick@a10ti,omap3-interface-clockI ammchs3_fck@a00ti,wait-gate-clock adss1_alwon_fck_3430es2@e00ti,dss-gate-clockPadss_ick_3430es2@e10ti,omap3-dss-interface-clock>ausbhost_120m_fck@1400ti,gate-clockrausbhost_48m_fck@1400ti,dss-gate-clock/ausbhost_ick@1410ti,omap3-dss-interface-clock>aclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH adma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmaagpio@48310000ti,omap3-gpioH1gpio1agpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6aserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H ti,twl4030default(audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci 2@ Lvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@aregulator-vioti,twl4030-viow@w@aregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0aregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5aregulator-vusb1v8ti,twl4030-vusb1v8aregulator-vusb3v1ti,twl4030-vusb3v1aregulator-vpll1ti,twl4030-vpll1 pvdds_dsiw@w@aregulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-agpioti,twl4030-gpio]iatwl4030-usbti,twl4030-usb vpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadD?  @A Bsrmadcti,twl4030-madcai2c@48072000 ti,omap3-i2cH 9txrx+i2c2ai2c@48060000 ti,omap3-i2cH=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @&dsp 8 Cspi@48098000ti,omap2-mcspiH A+mcspi1N@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2N +,-.tx0rx0tx1rx1ads7846@0 ti,ads7846\g`  y  spi@480b8000ti,omap2-mcspiH [+mcspi3N tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4NFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1-=>txrx:GS`mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400jti,omap2-iommuH mmu_ispwammu@5d000000jti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayamcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+ 0,anand@0,0ti,omap2-nand  0?Qswar,,",(6@RR((:+x-loader@0 RX-Loaderbootloaders@80000RU-Bootbootloaders_env@260000 RU-Boot Env&kernel@280000RKernel(@filesystem@680000 RFile Systemhethernet@6,0davicom,dm9000X cu?r066ZZ0H:(usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs_jr dss@48050000 ti,omap3-dssHok dss_corefck+default({dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H 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SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuserRuser E encoder0 ti,tfp410 ports+port@0endpointaport@1endpointaconnector0dvi-connectorRdvi  portendpointaconnector1svideo-connectorRtvportendpointadisplay panel-dpiRlcd portendpointapanel-timing     )     $ 1 > H compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repti,keep-vref-onti,settle-delay-usecwakeup-sourceti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsti,sysc-maskpolling-delay-passivepolling-delaycoefficientsthermal-sensorsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codepowerdown-gpiosdigitalddc-i2c-busenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active