L8(p%lg,omap3-sniperti,omap36xxti,omap3 +7LG Optimus Blackchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8lcpux|cpus 'O 57pmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+ )FdefaultTpinmux_uart3_pins\npTpinmux_dp3t_sel_pins\fhTpinmux_i2c1_pins\Tpinmux_i2c2_pins\Tpinmux_i2c3_pins\Tpinmux_lp8720_en_pin\PTpinmux_mmc1_pins0\Tpinmux_mmc2_pinsP\(*,.02468:Tpinmux_usb_otg_hs_pins`\rtvxz|~Tpinmux_twl4030_pins\ATscm_conf@270sysconsimple-busxp0+ p0Tpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapxppbias_mmc_omap2430wpbias_mmc_omap2430w@-Tclocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xhTmcbsp5_fckti,composite-clock|Tmcbsp1_mux_fck@4ti,composite-mux-clock|xT mcbsp1_fckti,composite-clock| Tmcbsp2_mux_fck@4ti,composite-mux-clock| xT mcbsp2_fckti,composite-clock| Tmcbsp3_mux_fck@68ti,composite-mux-clock| xhTmcbsp3_fckti,composite-clock|Tmcbsp4_mux_fck@68ti,composite-mux-clock| xhTmcbsp4_fckti,composite-clock|Tclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+ )Fdefaultpinmux_mmc1_cd_pin\Tpinmux_twl4030_vpins \Taes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockYTosc_sys_ck@d40 ti,mux-clock|x @Tsys_ck@1270ti,divider-clock|xpTsys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock|Tdpll4_x2_ckfixed-factor-clock|corex2_fckfixed-factor-clock|Twkup_l4_ickfixed-factor-clock|TNcorex2_d3_fckfixed-factor-clock|Tcorex2_d5_fckfixed-factor-clock|Tclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockT@virt_12m_ck fixed-clockTvirt_13m_ck fixed-clock]@Tvirt_19200000_ck fixed-clock$Tvirt_26000000_ck fixed-clockTvirt_38_4m_ck fixed-clockITdpll4_ck@d00ti,omap3-dpll-per-j-type-clock|x D 0Tdpll4_m2_ck@d48ti,divider-clock|?x HT dpll4_m2x2_mul_ckfixed-factor-clock| T!dpll4_m2x2_ck@d00ti,hsdiv-gate-clock|!x &T"omap_96m_alwon_fckfixed-factor-clock|"T)dpll3_ck@d00ti,omap3-dpll-core-clock|x @ 0Tdpll3_m3_ck@1140ti,divider-clock|x@T#dpll3_m3x2_mul_ckfixed-factor-clock|#T$dpll3_m3x2_ck@d00ti,hsdiv-gate-clock|$ x &T%emu_core_alwon_ckfixed-factor-clock|%Tbsys_altclk fixed-clockT.mcbsp_clks fixed-clockTdpll3_m2_ck@d40ti,divider-clock|x @Tcore_ckfixed-factor-clock|T&dpll1_fck@940ti,divider-clock|&x @T'dpll1_ck@904ti,omap3-dpll-clock|'x  $ @ 4Tdpll1_x2_ckfixed-factor-clock|T(dpll1_x2m2_ck@944ti,divider-clock|(x DT<cm_96m_fckfixed-factor-clock|)T*omap_96m_fck@d40 ti,mux-clock|*x @TEdpll4_m3_ck@e40ti,divider-clock| x@T+dpll4_m3x2_mul_ckfixed-factor-clock|+T,dpll4_m3x2_ck@d00ti,hsdiv-gate-clock|,x &T-omap_54m_fck@d40 ti,mux-clock|-.x @T8cm_96m_d2_fckfixed-factor-clock|*T/omap_48m_fck@d40 ti,mux-clock|/.x @T0omap_12m_fckfixed-factor-clock|0TGdpll4_m4_ck@e40ti,divider-clock| x@T1dpll4_m4x2_mul_ckti,fixed-factor-clock|1<JWT2dpll4_m4x2_ck@d00ti,gate-clock|2x &WTdpll4_m5_ck@f40ti,divider-clock|?x@T3dpll4_m5x2_mul_ckti,fixed-factor-clock|3<JWT4dpll4_m5x2_ck@d00ti,hsdiv-gate-clock|4x &WTjdpll4_m6_ck@1140ti,divider-clock|?x@T5dpll4_m6x2_mul_ckfixed-factor-clock|5T6dpll4_m6x2_ck@d00ti,hsdiv-gate-clock|6x &T7emu_per_alwon_ckfixed-factor-clock|7Tcclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|&x pT9clkout2_src_mux_ck@d70ti,composite-mux-clock|&*8x pT:clkout2_src_ckti,composite-clock|9:T;sys_clkout2@d70ti,divider-clock|;@x pjmpu_ckfixed-factor-clock|<T=arm_fck@924ti,divider-clock|=x $emu_mpu_alwon_ckfixed-factor-clock|=Tdl3_ick@a40ti,divider-clock|&x @T>l4_ick@a40ti,divider-clock|>x @T?rm_ick@c40ti,divider-clock|?x @gpt10_gate_fck@a00ti,composite-gate-clock| x TAgpt10_mux_fck@a40ti,composite-mux-clock|@x @TBgpt10_fckti,composite-clock|ABgpt11_gate_fck@a00ti,composite-gate-clock| x TCgpt11_mux_fck@a40ti,composite-mux-clock|@x @TDgpt11_fckti,composite-clock|CDcore_96m_fckfixed-factor-clock|ETmmchs2_fck@a00ti,wait-gate-clock|x Tmmchs1_fck@a00ti,wait-gate-clock|x Ti2c3_fck@a00ti,wait-gate-clock|x Ti2c2_fck@a00ti,wait-gate-clock|x Ti2c1_fck@a00ti,wait-gate-clock|x Tmcbsp5_gate_fck@a00ti,composite-gate-clock| x Tmcbsp1_gate_fck@a00ti,composite-gate-clock| x T core_48m_fckfixed-factor-clock|0TFmcspi4_fck@a00ti,wait-gate-clock|Fx Tmcspi3_fck@a00ti,wait-gate-clock|Fx Tmcspi2_fck@a00ti,wait-gate-clock|Fx Tmcspi1_fck@a00ti,wait-gate-clock|Fx Tuart2_fck@a00ti,wait-gate-clock|Fx Tuart1_fck@a00ti,wait-gate-clock|Fx  Tcore_12m_fckfixed-factor-clock|GTHhdq_fck@a00ti,wait-gate-clock|Hx Tcore_l3_ickfixed-factor-clock|>TIsdrc_ick@a10ti,wait-gate-clock|Ix Tgpmc_fckfixed-factor-clock|Icore_l4_ickfixed-factor-clock|?TJmmchs2_ick@a10ti,omap3-interface-clock|Jx Tmmchs1_ick@a10ti,omap3-interface-clock|Jx Thdq_ick@a10ti,omap3-interface-clock|Jx Tmcspi4_ick@a10ti,omap3-interface-clock|Jx Tmcspi3_ick@a10ti,omap3-interface-clock|Jx Tmcspi2_ick@a10ti,omap3-interface-clock|Jx Tmcspi1_ick@a10ti,omap3-interface-clock|Jx Ti2c3_ick@a10ti,omap3-interface-clock|Jx Ti2c2_ick@a10ti,omap3-interface-clock|Jx Ti2c1_ick@a10ti,omap3-interface-clock|Jx Tuart2_ick@a10ti,omap3-interface-clock|Jx Tuart1_ick@a10ti,omap3-interface-clock|Jx  Tgpt11_ick@a10ti,omap3-interface-clock|Jx  Tgpt10_ick@a10ti,omap3-interface-clock|Jx  Tmcbsp5_ick@a10ti,omap3-interface-clock|Jx  Tmcbsp1_ick@a10ti,omap3-interface-clock|Jx  Tomapctrl_ick@a10ti,omap3-interface-clock|Jx Tdss_tv_fck@e00ti,gate-clock|8xTdss_96m_fck@e00ti,gate-clock|ExTdss2_alwon_fck@e00ti,gate-clock|xTdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock|x TKgpt1_mux_fck@c40ti,composite-mux-clock|@x @TLgpt1_fckti,composite-clock|KLaes2_ick@a10ti,omap3-interface-clock|Jx Twkup_32k_fckfixed-factor-clock|@TMgpio1_dbck@c00ti,gate-clock|Mx Tsha12_ick@a10ti,omap3-interface-clock|Jx Twdt2_fck@c00ti,wait-gate-clock|Mx Twdt2_ick@c10ti,omap3-interface-clock|Nx Twdt1_ick@c10ti,omap3-interface-clock|Nx Tgpio1_ick@c10ti,omap3-interface-clock|Nx Tomap_32ksync_ick@c10ti,omap3-interface-clock|Nx Tgpt12_ick@c10ti,omap3-interface-clock|Nx Tgpt1_ick@c10ti,omap3-interface-clock|Nx Tper_96m_fckfixed-factor-clock|)T per_48m_fckfixed-factor-clock|0TOuart3_fck@1000ti,wait-gate-clock|Ox Tgpt2_gate_fck@1000ti,composite-gate-clock|xTPgpt2_mux_fck@1040ti,composite-mux-clock|@x@TQgpt2_fckti,composite-clock|PQgpt3_gate_fck@1000ti,composite-gate-clock|xTRgpt3_mux_fck@1040ti,composite-mux-clock|@x@TSgpt3_fckti,composite-clock|RSgpt4_gate_fck@1000ti,composite-gate-clock|xTTgpt4_mux_fck@1040ti,composite-mux-clock|@x@TUgpt4_fckti,composite-clock|TUgpt5_gate_fck@1000ti,composite-gate-clock|xTVgpt5_mux_fck@1040ti,composite-mux-clock|@x@TWgpt5_fckti,composite-clock|VWgpt6_gate_fck@1000ti,composite-gate-clock|xTXgpt6_mux_fck@1040ti,composite-mux-clock|@x@TYgpt6_fckti,composite-clock|XYgpt7_gate_fck@1000ti,composite-gate-clock|xTZgpt7_mux_fck@1040ti,composite-mux-clock|@x@T[gpt7_fckti,composite-clock|Z[gpt8_gate_fck@1000ti,composite-gate-clock| xT\gpt8_mux_fck@1040ti,composite-mux-clock|@x@T]gpt8_fckti,composite-clock|\]gpt9_gate_fck@1000ti,composite-gate-clock| xT^gpt9_mux_fck@1040ti,composite-mux-clock|@x@T_gpt9_fckti,composite-clock|^_per_32k_alwon_fckfixed-factor-clock|@T`gpio6_dbck@1000ti,gate-clock|`xTgpio5_dbck@1000ti,gate-clock|`xTgpio4_dbck@1000ti,gate-clock|`xTgpio3_dbck@1000ti,gate-clock|`xTgpio2_dbck@1000ti,gate-clock|`x Twdt3_fck@1000ti,wait-gate-clock|`x Tper_l4_ickfixed-factor-clock|?Tagpio6_ick@1010ti,omap3-interface-clock|axTgpio5_ick@1010ti,omap3-interface-clock|axTgpio4_ick@1010ti,omap3-interface-clock|axTgpio3_ick@1010ti,omap3-interface-clock|axTgpio2_ick@1010ti,omap3-interface-clock|ax Twdt3_ick@1010ti,omap3-interface-clock|ax Tuart3_ick@1010ti,omap3-interface-clock|ax Tuart4_ick@1010ti,omap3-interface-clock|axTgpt9_ick@1010ti,omap3-interface-clock|ax Tgpt8_ick@1010ti,omap3-interface-clock|ax Tgpt7_ick@1010ti,omap3-interface-clock|axTgpt6_ick@1010ti,omap3-interface-clock|axTgpt5_ick@1010ti,omap3-interface-clock|axTgpt4_ick@1010ti,omap3-interface-clock|axTgpt3_ick@1010ti,omap3-interface-clock|axTgpt2_ick@1010ti,omap3-interface-clock|axTmcbsp2_ick@1010ti,omap3-interface-clock|axTmcbsp3_ick@1010ti,omap3-interface-clock|axTmcbsp4_ick@1010ti,omap3-interface-clock|axTmcbsp2_gate_fck@1000ti,composite-gate-clock|xT mcbsp3_gate_fck@1000ti,composite-gate-clock|xTmcbsp4_gate_fck@1000ti,composite-gate-clock|xTemu_src_mux_ck@1140 ti,mux-clock|bcdx@Teemu_src_ckti,clkdm-gate-clock|eTfpclk_fck@1140ti,divider-clock|fx@pclkx2_fck@1140ti,divider-clock|fx@atclk_fck@1140ti,divider-clock|fx@traceclk_src_fck@1140 ti,mux-clock|bcdx@Tgtraceclk_fck@1140ti,divider-clock|g x@secure_32k_fck fixed-clockThgpt12_fckfixed-factor-clock|hwdt1_fckfixed-factor-clock|hsecurity_l4_ick2fixed-factor-clock|?Tiaes1_ick@a14ti,omap3-interface-clock|ix rng_ick@a14ti,omap3-interface-clock|ix sha11_ick@a14ti,omap3-interface-clock|ix des1_ick@a14ti,omap3-interface-clock|ix cam_mclk@f00ti,gate-clock|jxWcam_ick@f10!ti,omap3-no-wait-interface-clock|?xTcsi2_96m_fck@f00ti,gate-clock|xTsecurity_l3_ickfixed-factor-clock|>Tkpka_ick@a14ti,omap3-interface-clock|kx icr_ick@a10ti,omap3-interface-clock|Jx des2_ick@a10ti,omap3-interface-clock|Jx mspro_ick@a10ti,omap3-interface-clock|Jx mailboxes_ick@a10ti,omap3-interface-clock|Jx ssi_l4_ickfixed-factor-clock|?Trsr1_fck@c00ti,wait-gate-clock|x Tsr2_fck@c00ti,wait-gate-clock|x Tsr_l4_ickfixed-factor-clock|?dpll2_fck@40ti,divider-clock|&x@Tldpll2_ck@4ti,omap3-dpll-clock|lx$@4Tmdpll2_m2_ck@44ti,divider-clock|mxDTniva2_ck@0ti,wait-gate-clock|nxTmodem_fck@a00ti,omap3-interface-clock|x Tsad2d_ick@a10ti,omap3-interface-clock|>x Tmad2d_ick@a18ti,omap3-interface-clock|>x Tmspro_fck@a00ti,wait-gate-clock|x ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock|x Tossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock|x @$Tpssi_ssr_fck_3430es2ti,composite-clock|opTqssi_sst_fck_3430es2fixed-factor-clock|qThsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock|Ix Tssi_ick_3430es2@a10ti,omap3-ssi-interface-clock|rx Tusim_gate_fck@c00ti,composite-gate-clock|E x T}sys_d2_ckfixed-factor-clock|Ttomap_96m_d2_fckfixed-factor-clock|ETuomap_96m_d4_fckfixed-factor-clock|ETvomap_96m_d8_fckfixed-factor-clock|ETwomap_96m_d10_fckfixed-factor-clock|E Txdpll5_m2_d4_ckfixed-factor-clock|sTydpll5_m2_d8_ckfixed-factor-clock|sTzdpll5_m2_d16_ckfixed-factor-clock|sT{dpll5_m2_d20_ckfixed-factor-clock|sT|usim_mux_fck@c40ti,composite-mux-clock(|tuvwxyz{|x @T~usim_fckti,composite-clock|}~usim_ick@c10ti,omap3-interface-clock|Nx  Tdpll5_ck@d04ti,omap3-dpll-clock|x  $ L 4Tdpll5_m2_ck@d50ti,divider-clock|x PTssgx_gate_fck@b00ti,composite-gate-clock|&x Tcore_d3_ckfixed-factor-clock|&Tcore_d4_ckfixed-factor-clock|&Tcore_d6_ckfixed-factor-clock|&Tomap_192m_alwon_fckfixed-factor-clock|"Tcore_d2_ckfixed-factor-clock|&Tsgx_mux_fck@b40ti,composite-mux-clock |*x @Tsgx_fckti,composite-clock|sgx_ick@b10ti,wait-gate-clock|>x Tcpefuse_fck@a08ti,gate-clock|x Tts_fck@a08ti,gate-clock|@x Tusbtll_fck@a08ti,wait-gate-clock|sx Tusbtll_ick@a18ti,omap3-interface-clock|Jx Tmmchs3_ick@a10ti,omap3-interface-clock|Jx Tmmchs3_fck@a00ti,wait-gate-clock|x Tdss1_alwon_fck_3430es2@e00ti,dss-gate-clock|xWTdss_ick_3430es2@e10ti,omap3-dss-interface-clock|?xTusbhost_120m_fck@1400ti,gate-clock|sxTusbhost_48m_fck@1400ti,dss-gate-clock|0xTusbhost_ick@1410ti,omap3-dss-interface-clock|?xTuart4_fck@1000ti,wait-gate-clock|OxTclockdomainscore_l3_clkdmti,clockdomain|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|fdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|md2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH Tdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH`  `dmaTgpio@48310000ti,omap3-gpioxH1gpio1Tgpio@49050000ti,omap3-gpioxIgpio2 Tgpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5 gpio@49058000ti,omap3-gpioxI"gpio6 serial@4806a000ti,omap3-uartxH !H12txrxuart1lserial@4806c000ti,omap3-uartxH!I34txrxuart2lserial@49020000ti,omap3-uartxI!Jn56txrxuart3lFdefault5i2c@48070000 ti,omap3-i2cxH8txrx+i2c1Fdefault5'@twl@48xH  ti,twl4030Fdefault5powerti,twl4030-power?rtcti,twl4030-rtc bciti,twl4030-bci O] ivacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2**zregulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' Tregulator-vdacti,twl4030-vdacw@w@zregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0Tregulator-vusb1v5ti,twl4030-vusb1v5Tregulator-vusb1v8ti,twl4030-vusb1v8Tregulator-vusb3v1ti,twl4030-vusb3v1Tregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpiotwl4030-usbti,twl4030-usb Tpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad sramadcti,twl4030-madcTi2c@48072000 ti,omap3-i2cxH 9txrx+i2c2Fdefault5i2c@48060000 ti,omap3-i2cxH=txrx+i2c3Fdefault5lp8720@7dFdefault5 ti,lp8720x} ldo1--Tmailbox@48094000ti,omap3-mailboxmailboxxH @&2Ddsp V aspi@48098000ti,omap2-mcspixH A+mcspi1l@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2l +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3l tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4lFGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1z=>txrxFdefault5  mmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrxFdefault5mmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuxH mmu_ispTmmu@5d000000ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< commontxrxmcbsp1 txrx|fck disabledmcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 commontxrxmcbsp4txrx|fck disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR commontxrxmcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxtimer@48318000ti,omap3430-timerxH1%timer1"timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer51timer@4903a000ti,omap3430-timerxI*timer61timer@4903c000ti,omap3430-timerxI+timer71timer@4903e000ti,omap3430-timerxI,timer8>1timer@49040000ti,omap3430-timerxI-timer9>timer@48086000ti,omap3430-timerxH`.timer10>timer@48088000ti,omap3430-timerxH/timer11>timer@48304000ti,omap3430-timerxH0@_timer12"Kusbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHDL[ehci@48064800 ti,ehci-omapxHHMgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtxs+usb_otg_hs@480ab000ti,omap3-musbxH \]mcdma usb_otg_hs Fdefault5 usb2-phy2dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H protophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokxHHsysgddGgdd_mpu+ |q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxHHtxrxCDssi-port@4805b000ti,omap3-ssi-portxHHtxrxEFserial@49042000ti,omap3-uartxI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 wabb_mpu_iva+xH0rH0hbase-addressint-address|`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singlexH%\+ )isp@480bc000 ti,omap3-ispxH H p&ports+bandgap@48002524xH%$ti,omap36xx-bandgap2Ttarget-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_corexH 8syscH U|fck+ H smartreflex@0ti,omap3-smartreflex-corextarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaxH 8syscH U|fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaxthermal-zonescpu_thermalcyN memory@80000000lmemoryx  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namesphandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initinterrupts-extendedpinctrl-0ti,use_poweroffbci3v1-supplyio-channelsio-channel-namesregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsenable-gpios#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplycd-gpiosbus-widthti,non-removablestatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,sysc-maskti,sysc-sidlepolling-delay-passivepolling-delaycoefficientsthermal-sensors