.8%<( %$ti,omap4-pandati,omap4430ti,omap4 +7TI OMAP4 PandaBoardchosenB=/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0aliases?I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EX/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0B]/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Be/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bm/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0Bu/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 }/connector0 /connector1_/ocp/interconnect@4a000000/segment@0/target-module@64000/usbhshost@0/ehci@c00/hub@1/usbether@1cpus+cpu@0arm,cortex-a9cpucpu  'O 5acpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmudebugssinterrupt-controller@48241000arm,cortex-a9-gic !H$H$ l2-cache-controller@48242000arm,pl310-cacheH$ 2@local-timer@48240600arm,cortex-a9-twd-timerH$  L  interrupt-controller@48281000ti,omap4-wugen-mpu !H( socti,omap-inframpu ti,omap4-mpumpuWdsp ti,omap3-c64dspiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+\l3_main_1l3_main_2l3_main_3DD EL  interconnect@4a300000ti,omap4-l4-wkupsimple-busJ0J0J0 caplaia0+$\J0J1J2segment@0 simple-bus+\`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc counter_32k@@ crevsyscm 0fck+ \@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`crev+ \` prm@0 ti,omap4-prm  L + \ clocks+sys_clkin_ck@110{ ti,mux-clock abe_dpll_bypass_clk_mux_ck@108{ ti,mux-clock3abe_dpll_refclk_mux_ck@10c{ ti,mux-clock 2dbgclk_mux_ck{fixed-factor-clockl4_wkup_clk_mux_ck@108{ ti,mux-clocksyc_clk_div_ck@100{ti,divider-clockusim_ck@1858{ti,divider-clockXusim_fclk@1858{ti,gate-clockXtrace_clk_div_ck{ti,clkdm-gate-clock bandgap_fclk@1888{ti,gate-clockclockdomainsemu_sys_clkdmti,clockdomainl4_wkup_cm@1800 ti,omap4-cm+ \clk@20 ti,clkctrl \{emu_sys_cm@1a00 ti,omap4-cm+ \clk@20 ti,clkctrl {target-module@a000ti,sysc-omap4ti,sysccrev+ \scrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310{ ti,composite-no-wait-gate-clockauxclk0_src_mux_ck@310{ti,composite-mux-clock auxclk0_src_ck{ti,composite-clockauxclk0_ck@310{ti,divider-clock*auxclk1_src_gate_ck@314{ ti,composite-no-wait-gate-clockauxclk1_src_mux_ck@314{ti,composite-mux-clock auxclk1_src_ck{ti,composite-clockauxclk1_ck@314{ti,divider-clock+auxclk2_src_gate_ck@318{ ti,composite-no-wait-gate-clockauxclk2_src_mux_ck@318{ti,composite-mux-clock auxclk2_src_ck{ti,composite-clock auxclk2_ck@318{ti,divider-clock ,auxclk3_src_gate_ck@31c{ ti,composite-no-wait-gate-clock!auxclk3_src_mux_ck@31c{ti,composite-mux-clock "auxclk3_src_ck{ti,composite-clock!"#auxclk3_ck@31c{ti,divider-clock#-auxclk4_src_gate_ck@320{ ti,composite-no-wait-gate-clock $auxclk4_src_mux_ck@320{ti,composite-mux-clock  %auxclk4_src_ck{ti,composite-clock$%&auxclk4_ck@320{ti,divider-clock& .auxclk5_src_gate_ck@324{ ti,composite-no-wait-gate-clock$'auxclk5_src_mux_ck@324{ti,composite-mux-clock $(auxclk5_src_ck{ti,composite-clock'()auxclk5_ck@324{ti,divider-clock)$/auxclkreq0_ck@210{ ti,mux-clock*+,-./auxclkreq1_ck@214{ ti,mux-clock*+,-./auxclkreq2_ck@218{ ti,mux-clock*+,-./auxclkreq3_ck@21c{ ti,mux-clock*+,-./auxclkreq4_ck@220{ ti,mux-clock*+,-./ auxclkreq5_ck@224{ ti,mux-clock*+,-./$clockdomainstarget-module@c000ti,sysc-omap4ti,syscctrl_module_wkup crevsyscm+ \scm@c000ti,omap4-scm-wkupsegment@10000 simple-bus+x\@@PPtarget-module@0ti,sysc-omap2ti,syscgpio1crevsyscsyssm fckdbclk+ \gpio@0ti,omap4-gpio L !target-module@4000ti,sysc-omap2ti,sysc wd_timer2@@@crevsyscsyss"m fck+ \@wdt@0ti,omap4-wdtti,omap3-wdt LPtarget-module@8000ti,sysc-omap2-timerti,sysctimer1crevsyscsyss' m  fck+ \timer@0ti,omap3430-timer  fck L% target-module@c000ti,sysc-omap2ti,sysckbdcrevsyscsyss' m Xfck+ \keypad@0ti,omap4-keypad Lxcmputarget-module@e000ti,sysc-omap4ti,syscctrl_module_pad_wkup crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@8+/! >\pinmux_leds_wkpinsypinmux_twl6030_wkup_pinsypsegment@20000 simple-bus+\``  00@@PPpptarget-module@0ti,sysc disabled+ \target-module@2000ti,sysc disabled+ \ target-module@4000ti,sysc disabled+ \@target-module@6000ti,sysc disabled+0\`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-busJJJ caplaia0+T\JJJJ J (J(0J0segment@0 simple-bus+\ 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,syscctrl_module_core   crevsyscm+ \ scm@0ti,omap4-scm-coresimple-bus+ \scm_conf@0syscon+control-phy@300ti,control-phy-usb2cpower`control-phy@33cti,control-phy-otghs<cotghs_control_target-module@4000ti,sysc-omap4ti,sysc@crev+ \@cm1@0ti,omap4-cm1simple-bus + \ clocks+extalt_clkin_ck{ fixed-clockDpad_clks_src_ck{ fixed-clock0pad_clks_ck@108{ti,gate-clock0pad_slimbus_core_clks_ck{ fixed-clocksecure_32k_clk_src_ck{ fixed-clockslimbus_src_clk{ fixed-clock1slimbus_clk@108{ti,gate-clock1 sys_32k_ck{ fixed-clockvirt_12000000_ck{ fixed-clockvirt_13000000_ck{ fixed-clock]@ virt_16800000_ck{ fixed-clockY virt_19200000_ck{ fixed-clock$ virt_26000000_ck{ fixed-clock virt_27000000_ck{ fixed-clock virt_38400000_ck{ fixed-clockItie_low_clock_ck{ fixed-clockutmi_phy_clkout_ck{ fixed-clockxclk60mhsp1_ck{ fixed-clockZxclk60mhsp2_ck{ fixed-clock[xclk60motg_ck{ fixed-clockdpll_abe_ck@1e0{ti,omap4-dpll-m4xen-clock234dpll_abe_x2_ck@1f0{ti,omap4-dpll-x2-clock45dpll_abe_m2x2_ck@1f0{ti,divider-clock56abe_24m_fclk{fixed-factor-clock6abe_clk@108{ti,divider-clock6dpll_abe_m3x2_ck@1f4{ti,divider-clock57core_hsd_byp_clk_mux_ck@12c{ ti,mux-clock7,8dpll_core_ck@120{ti,omap4-dpll-core-clock8 $,(9dpll_core_x2_ck{ti,omap4-dpll-x2-clock9:dpll_core_m6x2_ck@140{ti,divider-clock:@dpll_core_m2_ck@130{ti,divider-clock90;ddrphy_ck{fixed-factor-clock;dpll_core_m5x2_ck@13c{ti,divider-clock:<<div_core_ck@100{ti,divider-clock<Gdiv_iva_hs_clk@1dc{ti,divider-clock<@div_mpu_hs_clk@19c{ti,divider-clock<Fdpll_core_m4x2_ck@138{ti,divider-clock:8=dll_clk_div_ck{fixed-factor-clock=dpll_abe_m2_ck@1f0{ti,divider-clock4Jdpll_core_m3x2_gate_ck@134{ ti,composite-no-wait-gate-clock:4>dpll_core_m3x2_div_ck@134{ti,composite-divider-clock:4?dpll_core_m3x2_ck{ti,composite-clock>?dpll_core_m7x2_ck@144{ti,divider-clock:Diva_hsd_byp_clk_mux_ck@1ac{ ti,mux-clock@Adpll_iva_ck@1a0{ti,omap4-dpll-clockAB7Bdpll_iva_x2_ck{ti,omap4-dpll-x2-clockBCdpll_iva_m4x2_ck@1b8{ti,divider-clockCD~Ddpll_iva_m5x2_ck@1bc{ti,divider-clockCE] Edpll_mpu_ck@160{ti,omap4-dpll-clockF`dlhdpll_mpu_m2_ck@170{ti,divider-clockpper_hs_clk_div_ck{fixed-factor-clock7Kusb_hs_clk_div_ck{fixed-factor-clock7Ql3_div_ck@100{ti,divider-clockGHl4_div_ck@100{ti,divider-clockHlp_clk_div_ck{fixed-factor-clock6mpu_periphclk{fixed-factor-clockocp_abe_iclk@528{ti,divider-clock I(per_abe_24m_fclk{fixed-factor-clockJdummy_ck{ fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ \clk@20 ti,clkctrl {tesla_cm@400 ti,omap4-cm+ \clk@20 ti,clkctrl {]abe_cm@500 ti,omap4-cm+ \clk@20 ti,clkctrl l{Itarget-module@8000ti,sysc-omap4ti,sysccrev+ \ cm2@0ti,omap4-cm2simple-bus + \ clocks+per_hsd_byp_clk_mux_ck@14c{ ti,mux-clockKLLdpll_per_ck@140{ti,omap4-dpll-clockL@DLHMdpll_per_m2_ck@150{ti,divider-clockMPUdpll_per_x2_ck@150{ti,omap4-dpll-x2-clockMPNdpll_per_m2x2_ck@150{ti,divider-clockNPTdpll_per_m3x2_gate_ck@154{ ti,composite-no-wait-gate-clockNTOdpll_per_m3x2_div_ck@154{ti,composite-divider-clockNTPdpll_per_m3x2_ck{ti,composite-clockOPdpll_per_m4x2_ck@158{ti,divider-clockNXdpll_per_m5x2_ck@15c{ti,divider-clockN\dpll_per_m6x2_ck@160{ti,divider-clockN`Sdpll_per_m7x2_ck@164{ti,divider-clockNddpll_usb_ck@180{ti,omap4-dpll-j-type-clockQRdpll_usb_clkdcoldo_ck@1b4{ti,fixed-factor-clockRdpll_usb_m2_ck@190{ti,divider-clockRVducati_clk_mux_ck@100{ ti,mux-clockGSfunc_12m_fclk{fixed-factor-clockTfunc_24m_clk{fixed-factor-clockUfunc_24mc_fclk{fixed-factor-clockTfunc_48m_fclk@108{ti,divider-clockTfunc_48mc_fclk{fixed-factor-clockTfunc_64m_fclk@108{ti,divider-clockfunc_96m_fclk@108{ti,divider-clockTinit_60m_fclk@104{ti,divider-clockVYper_abe_nc_fclk@108{ti,divider-clockJsha2md5_fck@15c8{ti,gate-clockHusb_phy_cm_clk32k@640{ti,gate-clock@aclockdomainsl3_init_clkdmti,clockdomainRl4_ao_cm@600 ti,omap4-cm+ \clk@20 ti,clkctrl {bl3_1_cm@700 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_2_cm@800 ti,omap4-cm+ \clk@20 ti,clkctrl {ducati_cm@900 ti,omap4-cm + \ clk@20 ti,clkctrl {l3_dma_cm@a00 ti,omap4-cm + \ clk@20 ti,clkctrl {Wl3_emif_cm@b00 ti,omap4-cm + \ clk@20 ti,clkctrl {d2d_cm@c00 ti,omap4-cm + \ clk@20 ti,clkctrl {l4_cfg_cm@d00 ti,omap4-cm + \ clk@20 ti,clkctrl {cl3_instr_cm@e00 ti,omap4-cm+ \clk@20 ti,clkctrl ${ivahd_cm@f00 ti,omap4-cm+ \clk@20 ti,clkctrl {iss_cm@1000 ti,omap4-cm+ \clk@20 ti,clkctrl {jl3_dss_cm@1100 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_gfx_cm@1200 ti,omap4-cm+ \clk@20 ti,clkctrl {l3_init_cm@1300 ti,omap4-cm+ \clk@20 ti,clkctrl {Xl4_per_cm@1400 ti,omap4-cm+ \clk@20 ti,clkctrl D{ktarget-module@56000ti,sysc-omap2ti,sysc dma_system``,`(crevsyscsyss# # m Wfck+ \`dma-controller@0ti,omap4430-sdma0L  1< Iwtarget-module@58000ti,sysc-omap2ti,syschsicrevsyscsyss##m Xfck+ \@hsi@0 ti,omap4-hsi@Jcsysgdd Xhsi_fck LGVgdd_mpu+ \@hsi-port@2000ti,omap4-hsi-port (ctxrx LChsi-port@3000ti,omap4-hsi-port08ctxrx LDtarget-module@5e000ti,sysc disabled+ \ target-module@62000ti,sysc-omap2ti,sysc usb_tll_hs   crevsyscsyss m XHfck+ \ usbhstll@0 ti,usbhs-tll LNtarget-module@64000ti,sysc-omap4ti,sysc usb_host_hs@@@crevsyscsyss#m X8fck+ \@usbhshost@0ti,usbhs-host+ \ YZ[3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 fehci-phyohci@800ti,ohci-omap3 LLqehci@c00 ti,ehci-omap  LM\+hub@1 usb424,9514+usbether@1 usb424,ec00target-module@66000ti,sysc-omap2ti,syscmmu_dsp```crevsyscsyss m ]fck+ \` disabledsegment@80000 simple-bus+\      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ \target-module@2b000ti,sysc-omap2ti,sysc usb_otg_hscrevsyscsyss #m X@fck+ \usb_otg_hs@0ti,omap4-musbL\]Vmcdma^^ usb2-phy _l2target-module@2d000ti,sysc-omap2ti,syscocp2scp_usb_phycrevsyscsyss m Xfck+ \ocp2scp@0ti,omap-ocp2scp+ \usb2phy@80 ti,omap-usb2X`awkupclk^target-module@36000ti,sysc disabled+ \`target-module@4d000ti,sysc disabled+ \target-module@59000ti,sysc-omap4-srti,syscsmartreflex_mpu8csyscm bfck+ \smartreflex@0ti,omap4-smartreflex-mpu Ltarget-module@5b000ti,sysc-omap4-srti,syscsmartreflex_iva8csyscm bfck+ \smartreflex@0ti,omap4-smartreflex-iva Lftarget-module@5d000ti,sysc-omap4-srti,syscsmartreflex_core8csyscm bfck+ \smartreflex@0ti,omap4-smartreflex-core Ltarget-module@60000ti,sysc disabled+ \target-module@74000ti,sysc-omap4ti,syscmailbox@@ crevsysc m cfck+ \@mailbox@0ti,omap4-mailbox Lmbox_ipu  #mbox_dsp  #target-module@76000ti,sysc-omap2ti,sysc spinlock```crevsyscsyss m cfck+ \`spinlock@0ti,omap4-hwspinlock.segment@100000 simple-bus+`\  00target-module@0ti,sysc-omap4ti,syscctrl_module_pad_core crevsyscm+ \pinmux@40 ti,omap4-padconfpinctrl-single@+/! >\Wtxrxxytarget-module@9e000ti,sysc disabled+ \ target-module@a2000ti,sysc disabled+ \ target-module@a4000ti,sysc disabled+\ @ Ptarget-module@a8000ti,sysc disabled+ \ @target-module@ad000ti,sysc-omap4ti,syscmmc3   crevsysc#m kfck+ \ mmc@0ti,omap4-hsmmc L^|RwMwNWtxrx disabledtarget-module@b0000ti,sysc disabled+ \ target-module@b2000ti,sysc-omap2ti,syschdq1w   crevsyscsyss khfck+ \ 1w@0 ti,omap3-1w L:target-module@b4000ti,sysc-omap4ti,syscmmc2 @ @ crevsysc#m Xfck+ \ @mmc@0ti,omap4-hsmmc LV|Rw/w0Wtxrx disabledtarget-module@b8000ti,sysc-omap4ti,syscmcspi3   crevsyscm kfck+ \ spi@0ti,omap4-mcspi L[+aRwwWtx0rx0target-module@ba000ti,sysc-omap4ti,syscmcspi4   crevsyscm kfck+ \ spi@0ti,omap4-mcspi L0+aRwFwGWtx0rx0target-module@d1000ti,sysc-omap4ti,syscmmc4   crevsysc#m kfck+ \ mmc@0ti,omap4-hsmmc L`|Rw9w:Wtxrx disabledtarget-module@d5000ti,sysc-omap4ti,syscmmc5 P P crevsysc#m k@fck+ \ Pmmc@0ti,omap4-hsmmc L;|Rw;w<Wtxrx+ IHeadset StereophoneHSOLHeadset StereophoneHSORExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRHSMICHeadset MicHeadset MicHeadset Mic BiasAFMLLine InAFMRLine Inhsusb1_power_regregulator-fixed [hsusb1_vbusj2Z2Z  Zp0 khsusb1_phyusb-nop-xceiv }| - main_clk$\wl12xx_vmmc