8( *rockchip,rk3288-evb-rk808rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6 Bcpu@501cpuarm,cortex-a12!@/Bcpu@502cpuarm,cortex-a12!@/Bcpu@503cpuarm,cortex-a12!@/Bcpu-opp-tableoperating-points-v2JBopp-126000000U\ opp-216000000U \ opp-312000000U\ opp-408000000UQ\ opp-600000000U#F\ opp-696000000U)|\~opp-816000000U0,\B@opp-1008000000U<\opp-1200000000UG\opp-1416000000UTfr\Oopp-1512000000UZJ\ opp-1608000000U_"\pamba simple-busjdma-controller@ff250000arm,pl330arm,primecell%@q|/ apb_pclkBdma-controller@ff600000arm,pl330arm,primecell`@q|/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@q|/ apb_pclkBVreserved-memoryjdma-unusable@fe000000oscillator fixed-clockn6xin24mB timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H / a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр /Drvbiuciuciu-driveciu-sample  @resetokay)3EVhsdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр /Eswbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр /Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр /Guybiuciuciu-driveciu-sample #@resetokay)3hsdefaultsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW saradc-apbokayBxspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,sdefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -sdefault  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .sdefault!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Msdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Osdefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Psdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qsdefault(okayBmserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7/MUbaudclkapb_pclksdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8/NVbaudclkapb_pclksdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9/OWbaudclkapb_pclksdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :/PXbaudclkapb_pclksdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;/QYbaudclkapb_pclksdefault-okaythermal-zonesreserve_thermal .cpu_thermald .tripscpu_alert0*p6passiveB/cpu_alert1*$6passiveB0cpu_crit*_6 criticalcooling-mapsmap0A/ Fmap1A0 Fgpu_thermald .tripsgpu_alert0*p6passiveB1gpu_crit*_6 criticalcooling-mapsmap0A1 Ftsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk tsadc-apbsinitdefaultsleep2U3_2isokayB.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq48/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok5rgmiiinput 6 ,'B@AQ7sdefault8h0qusb@ff500000 generic-ehciP /usbhostz9usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghostz: usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ z; usb2-phy disabledusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Lsdefault<okaypmic@1brockchip,rk808&=sdefault>?xin32krk808-clkout2@@@@ @,@8DAPA]@jAwBregulatorsDCDC_REG1 qpvdd_armB regulator-state-memDCDC_REG2 Pvdd_gpuBqregulator-state-memB@DCDC_REG3vcc_ddrregulator-state-memDCDC_REG42Z2Zvcc_ioBAregulator-state-mem2ZLDO_REG12Z2Z vccio_pmuBBregulator-state-mem2ZLDO_REG22Z2Zvcc_tpregulator-state-memLDO_REG3B@B@vdd_10regulator-state-memB@LDO_REG4w@w@ vcc18_lcdregulator-state-memw@LDO_REG5w@2Z vccio_sdBregulator-state-mem2ZLDO_REG6B@B@ vdd10_lcdregulator-state-memB@LDO_REG7w@w@vcc_18Bregulator-state-memw@LDO_REG82Z2Z vcca_codecregulator-state-mem2ZSWITCH_REG1vcc_wlregulator-state-memSWITCH_REG2vcc_lcdB~regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c/NsdefaultC disabledpwm@ff680000rockchip,rk3288-pwmh6sdefaultD/^pwmokayB{pwm@ff680010rockchip,rk3288-pwmh6sdefaultE/^pwm disabledpwm@ff680020rockchip,rk3288-pwmh 6sdefaultF/^pwm disabledpwm@ff680030rockchip,rk3288-pwmh06sdefaultG/^pwm disabledbus_intmem@ff700000 mmio-srampjpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsBpower-controller!rockchip,rk3288-power-controllerAAhQ BYpd_vio@9 /chgfdehilkj$UHIJKLMNOPpd_hevc@11 /opUQRpd_video@12 /USpd_gpu@13 /UTUreboot-modesyscon-reboot-mode\cRBoRB}RB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4HAjk$#gׄeрxhрxhBsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwB4edp-phyrockchip,rk3288-dp-phy/h24mokayBiio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320 /]phyclkB;usb-phy@3344/^phyclkB9usb-phy@348H/_phyclkB:watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk/TVtx 6sdefaultW4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5VVtxrxi2s_hclki2s_clk/RsdefaultX disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkiface  disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkiface  disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclk4Y ilm coreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vop4Y def axiahbdclkBZokayportB endpoint@0I[Bnendpoint@1I\Bjendpoint@2I]Bdendpoint@3I^Bgiommu@ff930300rockchip,iommu  vopb_mmu/ aclkiface4Y  okayBZvop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vop4Y  axiahbdclkB_okayportB endpoint@0I`Boendpoint@1IaBkendpoint@2IbBeendpoint@3IcBhiommu@ff940300rockchip,iommu  vopl_mmu/ aclkiface4Y  okayB_mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclk4Y 4 disabledportsportendpoint@0IdB]endpoint@1IeBblvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdsslcdcf4Y 4 disabledportsport@0endpoint@0IgB^endpoint@1IhBcdp@ff970000rockchip,rk3288-dp@ b/icdppclkzidpodp4okayYportsport@0endpoint@0IjB\endpoint@1IkBaport@1endpoint@0IlBhdmi@ff980000rockchip,rk3288-dw-hdmi4 g/hmniahbisfrcec4Y okaycmportsportendpoint@0InB[endpoint@1IoB`iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkiface  disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkiface  disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/p4Y okayoqgpu-opp-tableoperating-points-v2Bpopp@100000000U\~opp@200000000U \~opp@300000000U\B@opp@400000000Uׄ\opp@500000000Ue\Oopp@600000000U#F\qos@ffaa0000syscon BTqos@ffaa0080syscon BUqos@ffad0000syscon BIqos@ffad0100syscon BJqos@ffad0180syscon BKqos@ffad0400syscon BLqos@ffad0480syscon BMqos@ffad0500syscon BHqos@ffad0800syscon BNqos@ffad0880syscon BOqos@ffad0900syscon BPqos@ffae0000syscon BSqos@ffaf0000syscon BQqos@ffaf0080syscon BRinterrupt-controller@ffc01000 arm,gic-400{@ @ `   Befuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4jgpio0@ff750000rockchip,gpio-banku Q/@{B=gpio1@ff780000rockchip,gpio-bankx R/A{gpio2@ff790000rockchip,gpio-banky S/B{gpio3@ff7a0000rockchip,gpio-bankz T/C{gpio4@ff7b0000rockchip,gpio-bank{ U/D{B6gpio5@ff7c0000rockchip,gpio-bank| V/E{gpio6@ff7d0000rockchip,gpio-bank} W/F{gpio7@ff7e0000rockchip,gpio-bank~ X/G{Bygpio8@ff7f0000rockchip,gpio-bank Y/H{hdmihdmi-cec-c0rhdmi-cec-c7rhdmi-ddc rrpcfg-pull-upBspcfg-pull-downBtpcfg-pull-noneBrpcfg-pull-none-12ma Bwsleepglobal-pwroffrB?ddrio-pwroffrddr0-retentionsddr1-retentionsedpedp-hpd ti2c0i2c0-xfer rrB<i2c1i2c1-xfer rrB%i2c2i2c2-xfer  r rBCi2c3i2c3-xfer rrB&i2c4i2c4-xfer rrB'i2c5i2c5-xfer rrB(i2s0i2s0-bus`rrrrrrBXlcdclcdc-ctl@rrrrBfsdmmcsdmmc-clkuB sdmmc-cmdvBsdmmc-cdsBsdmmc-bus1ssdmmc-bus4@vvvvBsdmmc-pwr rBsdio0sdio0-bus1ssdio0-bus4@sssssdio0-cmdssdio0-clkrsdio0-cdssdio0-wpssdio0-pwrssdio0-bkpwrssdio0-intssdio1sdio1-bus1ssdio1-bus4@sssssdio1-cdssdio1-wpssdio1-bkpwrssdio1-intssdio1-cmdssdio1-clkrsdio1-pwr semmcemmc-clkrBemmc-cmdsBemmc-pwr sBemmc-bus1semmc-bus4@ssssemmc-bus8ssssssssBspi0spi0-clk sBspi0-cs0 sBspi0-txsBspi0-rxsBspi0-cs1sspi1spi1-clk sBspi1-cs0 sB spi1-rxsBspi1-txsBspi2spi2-cs1sspi2-clksB!spi2-cs0sB$spi2-rxsB#spi2-tx sB"uart0uart0-xfer srB)uart0-ctssuart0-rtsruart1uart1-xfer s rB*uart1-cts suart1-rts ruart2uart2-xfer srB+uart3uart3-xfer srB,uart3-cts suart3-rts ruart4uart4-xfer srB-uart4-cts suart4-rts rtsadcotp-gpio rB2otp-out rB3pwm0pwm0-pinrBDpwm1pwm1-pinrBEpwm2pwm2-pinrBFpwm3pwm3-pinrBGgmacrgmii-pinsrrrrwwwwrrr wwrrB8rmii-pinsrrrrrrrrrrspdifspdif-tx rBWpcfg-pull-none-drv-8maBupcfg-pull-up-drv-8maBvbacklightbl-enrBzbuttonspwrbtnsBlcdlcd-csrB}pmicpmic-intsB>usbhost-vbus-drvrBeth_phyeth-phy-pwrrBmemory@0memoryadc-keys adc-keysxbuttons w@button-up :Volume Up@sKbutton-down :Volume Down@rKmenu:Menu@K esc:Esc@KB@home:Home@fK backlightpwm-backlighte  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~w ysdefaultz{B@B|external-gmac-clock fixed-clocksY@ ext_gmacB7panellg,lp079qx1-sp0vsimple-panel| y}~portsportendpointIBlgpio-keys gpio-keyssdefaultpower =@t:GPIO Key Powerdvcc-host-regulatorregulator-fixed =sdefault vcc_hostvcc-phy-regulatorregulator-fixed =sdefaultvcc_phy2Z2ZB5vsys-regulatorregulator-fixedvcc_sysLK@LK@B@sdmmc-regulatorregulator-fixed y sdefaultvcc_sd2Z2Z AB #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typedebounce-intervalenable-active-highstartup-delay-usvin-supply