8(\#asus,rk3288-tinkerrockchip,rk3288&7Rockchip RK3288 Tinker Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHSreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\nydefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#reset disabledsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW #saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,ydefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -ydefault disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .ydefault  disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mydefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oydefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pydefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qydefault$okayHiserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkydefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkydefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkydefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkydefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkydefault)okaythermal-zonesreserve_thermal*cpu_thermald*tripscpu_alert0"p.passiveH+cpu_alert1"$.passiveH,cpu_crit"_. criticalcooling-mapsmap09+ >map19, >gpu_thermald*tripsgpu_alert0"p.passiveH-gpu_crit"_. criticalcooling-mapsmap09- >tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbyinitdefaultsleep.M/W.awsokayH*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq085fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethok1inputrgmii2ydefault3 %45 K'B@`0iusb@ff500000 generic-ehciP 5usbhostr5wusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostr6 wusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ r7 wusb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Lydefault8okaypmic@1brockchip,rk808&9xin32krk808-clkout29 9 ydefault:;<=>> >>">.>:?F?R?_>l?y?regulatorsDCDC_REG1 qpvdd_armpH regulator-state-memDCDC_REG2 Pvdd_gpupHmregulator-state-mem1B@DCDC_REG3vcc_ddrregulator-state-memDCDC_REG42Z2Zvcc_ioH?regulator-state-mem12ZLDO_REG1w@w@ vcc18_ldo1Hregulator-state-mem1w@LDO_REG22Z2Z vcc33_mipiregulator-state-memLDO_REG3B@B@vdd_10regulator-state-mem1B@LDO_REG4w@w@ vcc18_codecregulator-state-mem1w@LDO_REG5w@2Z vccio_sdHregulator-state-mem12ZLDO_REG6B@B@ vdd10_lcdregulator-state-mem1B@LDO_REG7w@w@vcc_18regulator-state-mem1w@LDO_REG8w@w@ vcc18_lcdregulator-state-mem1w@SWITCH_REG1 vcc33_sdHregulator-state-memSWITCH_REG2 vcc33_lanH2regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5Nydefault@okaypwm@ff680000rockchip,rk3288-pwmhMydefaultA5^pwmokaypwm@ff680010rockchip,rk3288-pwmhMydefaultB5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh MydefaultC5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0MydefaultD5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerXh HVpd_vio@9 5chgfdehilkj$lEFGHIJKLMpd_hevc@11 5oplNOpd_video@12 5lPpd_gpu@13 5lQRreboot-modesyscon-reboot-modeszRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv0Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH0edp-phyrockchip,rk3288-dp-phy5h24m disabledHfio-domains"rockchip,rk3288-io-voltage-domainokayusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH7usb-phy@33445^phyclkH5usb-phy@348H5_phyclkH6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5TStx 6ydefaultT0 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5SStxrxi2s_hclki2s_clk5RydefaultUokayHwcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface1 disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface1> disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkYV ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopYV def #axiahbdclkgWokayportH endpoint@0nXHjendpoint@1nYHgendpoint@2nZHaendpoint@3n[Hdiommu@ff930300rockchip,iommu  vopb_mmu5 aclkifaceYV 1okayHWvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopYV  #axiahbdclkg\okayportH endpoint@0n]Hkendpoint@1n^Hhendpoint@2n_Hbendpoint@3n`Heiommu@ff940300rockchip,iommu  vopl_mmu5 aclkifaceYV 1okayH\mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkYV 0 disabledportsportendpoint@0naHZendpoint@1nbH_lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsylcdccYV 0 disabledportsport@0endpoint@0ndH[endpoint@1neH`dp@ff970000rockchip,rk3288-dp@ b5icdppclkrfwdpo#dp0 disabledportsport@0endpoint@0ngHYendpoint@1nhH^hdmi@ff980000rockchip,rk3288-dw-hdmi0 g5hmniahbisfrcecYV okay~iHvportsportendpoint@0njHXendpoint@1nkH]iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface1 disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface1 disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5lYV okaymgpu-opp-tableoperating-points-v2Hlopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon HQqos@ffaa0080syscon HRqos@ffad0000syscon HFqos@ffad0100syscon HGqos@ffad0180syscon HHqos@ffad0400syscon HIqos@ffad0480syscon HJqos@ffad0500syscon HEqos@ffad0800syscon HKqos@ffad0880syscon HLqos@ffad0900syscon HMqos@ffae0000syscon HPqos@ffaf0000syscon HNqos@ffaf0080syscon HOinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl0pgpio0@ff750000rockchip,gpio-banku Q5@H9gpio1@ff780000rockchip,gpio-bankx R5AHugpio2@ff790000rockchip,gpio-banky S5Bgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5DH4gpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5GHxgpio8@ff7f0000rockchip,gpio-bank Y5Hhdmihdmi-cec-c0nhdmi-cec-c7nhdmi-ddc nnpcfg-pull-upHopcfg-pull-downHppcfg-pull-noneHnpcfg-pull-none-12ma Hssleepglobal-pwroffnH;ddrio-pwroffnddr0-retentionoddr1-retentionoedpedp-hpd pi2c0i2c0-xfer nnH8i2c1i2c1-xfer nnH!i2c2i2c2-xfer  n nH@i2c3i2c3-xfer nnH"i2c4i2c4-xfer nnH#i2c5i2c5-xfer nnH$i2s0i2s0-bus`nnnnnnHUlcdclcdc-ctl@nnnnHcsdmmcsdmmc-clkqH sdmmc-cmdrHsdmmc-cdoHsdmmc-bus1osdmmc-bus4@rrrrHsdmmc-pwr nHysdio0sdio0-bus1osdio0-bus4@oooosdio0-cmdosdio0-clknsdio0-cdosdio0-wposdio0-pwrosdio0-bkpwrosdio0-intosdio1sdio1-bus1osdio1-bus4@oooosdio1-cdosdio1-wposdio1-bkpwrosdio1-intosdio1-cmdosdio1-clknsdio1-pwr oemmcemmc-clknemmc-cmdoemmc-pwr oemmc-bus1oemmc-bus4@ooooemmc-bus8oooooooospi0spi0-clk oHspi0-cs0 oHspi0-txoHspi0-rxoHspi0-cs1ospi1spi1-clk oHspi1-cs0 oHspi1-rxoHspi1-txoHspi2spi2-cs1ospi2-clkoHspi2-cs0oH spi2-rxoHspi2-tx oHuart0uart0-xfer onH%uart0-ctsouart0-rtsnuart1uart1-xfer o nH&uart1-cts ouart1-rts nuart2uart2-xfer onH'uart3uart3-xfer onH(uart3-cts ouart3-rts nuart4uart4-xfer onH)uart4-cts ouart4-rts ntsadcotp-gpio nH.otp-out nH/pwm0pwm0-pinnHApwm1pwm1-pinnHBpwm2pwm2-pinnHCpwm3pwm3-pinnHDgmacrgmii-pinsnnnnssssnnn ssnnH3rmii-pinsnnnnnnnnnnspdifspdif-tx nHTpcfg-pull-none-drv-8maHqpcfg-pull-up-drv-8maHrbacklightbl-ennbuttonspwrbtnoHteth_phyeth-phy-pwrnpmicpmic-intoH:dvs-1 pH<dvs-2 pH=usbhost-vbus-drvnpwr-3gnchosenserial2:115200n8memorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacH1gpio-keys gpio-keys*ydefaulttbutton@0 95t@GPIO Key PowerFWdgpio-leds gpio-ledsact-led uimmc0heartbeat-led u iheartbeatpwr-led 9 idefault-onsoundsimple-audio-cardi2srockchip,tinker-codecsimple-audio-card,codecvsimple-audio-card,cpuwvsys-regulatorregulator-fixedvcc_sysLK@LK@H>sdmmc-regulatorregulator-fixed 0x ydefaultyvcc_sd2Z2Z? #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply